My primary research interests lie in analysis of scientific datasets that meets throughput and/or latency goals while operating under constraints on available processing power. My group studies how to best implement these computations on modern, highly parallel computing architectures, including low-power multicores, GPUs, and field-programmable gate arrays (FPGAs). Utilizing these powerful accelerator architectures effectively raises a number of interesting theoretical and engineering problems in mapping and scheduling of parallel computations to meet performance goals and in the design of programming frameworks to support streaming and modular computation. It is often necessary to modify algorithms, or to invent entirely new algorithms, that exploit the parallelism in accelerator hardware.