Felipe Viel is a Computer Engineer graduated from the University of Vale do Itajaí (UNIVALI) and Master in Applied Computing postgraduted from the UNIVALI. His background and experience are in the design and development of embedded systems, more precisely in hardware area with emphasis on fault tolerance and digital signal processing, with +5 years of laboratory/development experience. His specialties are focused on design and development of digital systems with VHDL and Verilog languages, codesign, high- and low-level system integration, acceleration of algorithms with SoC FPGA devices, communication protocols, microcontroller designs and programming with C/C++ languages. He is an Assistant Professor at the University of Vale do Itajaí (UNIVALI) and researcher in the Laboratory of Embedded and Distributed Systems (UNIVALI).