Ankur Agrawal

Ankur Agrawal (Senior Member, IEEE) received the B.S. degree in chemical engineering from the Indian Institute of Technology, Kanpur, India, in 1999 and the Ph.D. degree in chemical engineering from the Georgia Institute of Technology, Atlanta, GA, USA, in 2003. He is currently a Principal Engineer and IC Packaging Technical Leader with the Silicon Photonics Product Division, Intel in Chandler, AZ, USA. In 2003, he joined Intel and has made contributions in many domains of IC packaging including assembly test chip design, die-package integration process solutions, assembly design rules, test vehicle definition, and package architecture definition of server BGA and LGA products. In his current role, he is leading the development of bumping and assembly process for receiver and transmitter packages or sub-assemblies for all pluggable optical transceiver modules, and guiding the packaging development of next generation photonics products including co-packaged optics and LIDAR. His expertise include the intersection of package DFM, silicon far back-end process, and assembly process development. He has 14 patents (granted or filed) and 13 publications. He was the Secretary for IEEE Phoenix section for the year 2021–2022.