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International Conference on Electronics Packaging (ICEP)Conference

Papers
In this study, we investigated effects of thermal gradient of joint during flip chip bonding on intermetallic compound (IMC) growth for several solder materials. Cu/Sn2.5Ag/Cu joint was prepared by bonding electroplated Cu/Sn2.5Ag bump on Cu pad. Ni/Sn/Ni, Ni/In/Ni, Ni/In-48Sn/Ni...
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In recent years, cognitive radio system has been receiving particular attention as a promising technology in order to materialize efficient network access. In this paper, heightening upper limit frequency of the wideband antenna for cognitive radio system was investigated by empl...
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For 3D chip stacking using via-middle Cu Through Silicon Via (TSV), the TSV liner/barrier reliability needs to be preserved during the whole backside process flow. In this paper, the impact of backside process on the via-middle TSV liner/barrier material reliability is investigat...
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Recent industrial globalization has increased the number of unanticipated product failures and troubles caused by using them in unexpected ways or situations. Developing new type of products to meet recent requirements for product innovation may also cause unanticipated troubles ...
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In an effort to simplify power electronics integration, we explored an additive manufacturing (AM) process, or commonly known as three-dimensional (3D) printing for fabricating magnetic components. A commercial fused-deposition-model (FDM) 3D printer was modified to extrude paste...
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This paper proposes simple simulation modeling method of Electromagnetic Interference (EMI) and predicting potential risk of EMI radiation by specific noise source focused on Printed Circuit Board (PCB). Electromagnetic Simulation (EM) is commonly used to accurately determine the...
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Hybrid pastes containing copper oxide particles with nano-(NPO) and submicron sizes (SMPO) were successfully developed for conductor fabrication through photonic sintering. Subjected to 3 or 4 flash pulses, copper particle pastes can be transformed into conductive sintered struct...
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Warpage of semiconductor packaging substrate during or after manufacturing processes has been a serious issue in the electronics industry. We found that the packaging substrate, which has initial warpage at room temperature, changes its warpage orientation by flipping from a conc...
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The Cu 6 Sn 5 intermetallic formed between Pb-free Sn-based solders and Cu substrates plays a critical role in the reliability of solder joints. Cu 6 Sn 5 can adopt at least two different crystal structures over the temperature range to which electronics circuitry is exposed duri...
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Sinter Ag joining as an attractive die attach material received more and more attention. Usually, to obtained an excellent strength bonding, sinter Ag joining need contact with the Ag, Au metallization layer on both chips and substrates. The electro- and electroless-plated Ni(P) ...
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Thermal stresses around void in TSV (Through Silicon Via) structure in 3D SiP were discussed under the conditions of device operation and reflow process by using FEM (Finite Element Method). In case of the condition of device operation, equivalent stress around void inside Cu TSV...
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In this study, the phase evolution upon heating of thiol-protected NPs of gold, silver and their alloys with various Au/Ag ratios (3:1, 1:1, and 1:3), as well as the phase transitions and oxidation of copper and copper-silver core shell NPs, are monitored by synchrotron radiation...
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T. Nakamura,M. Nakagawa
Ultraviolet nanoimprint lithography (UV-NIL) has become one of advanced pattering methods for fabrication of micro-and nano-structures over several inches by replication with designed mold patterns at high throughput and low cost. For practical application of UV-NIL, it is essent...
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S. Majcherek,A. Aman, J. Fochtmann
With the increasing number of plug connections in products, which are proportionally less and less space consuming, the potential for device failure caused by defect connectors increases. Therefore, it will be increasingly important to ensure the proper functioning of the electri...
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New microelectronics applications such as smartphones, automotive computing and server/AI CPUs heavily rely on wafer-level packaging (WLP) to meet performance targets. To meet future cost targets as well, Outsourced Semiconductor Assembly and Test (OSAT) foundries look to panel l...
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Tomio Iwasaki
A materials-informatics technique for designing strong flat interfaces has been developed by use of advanced simulation that can calculate the delamination energy as the adhesion strength. In this study, this technique is applied to the design of metal (or alloy) with strong adhe...
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In this study, we investigated the electric field distribution and transmission characteristics between a stationary device and an arm-mounted wearable human body communication device including earth ground. The results showed that when the stationary device signal electrode is e...
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The fabrication of a 2.5D glass interposer was demonstrated, and its electrical performance, including signal transmission, was characterized. Single-sided multi-level enhanced copper redistribution layers were fabricated on a glass substrate with through glass via. This structur...
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T. Sakai, E. Watanabe, T. Sei, K. Yamanaka
Electromigration (EM) in Sn-based solder joints is recognized as a major reliability problem in high performance semiconductor devices in the current microelectronics area and in power modules in the next generation hybrid and electric vehicles. It is known that the EM failure ti...
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This paper describes development of joint materials using only base metals (Cu and Sn) for power semiconductor assembly. The preform sheet of the joint material is made by two kinds of particles such as Cu source and Cu-Sn IMC source. Optimized ratio of Cu source: IMC source prov...
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