SP-IMC: A Sparsity Aware In-Memory-Computing Macro in 28nm CMOS with Configurable Sparse Representation for Highly Sparse DNN Workloads
2024 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE, CICC（2024）
关键词
Deep Neural Network,Sparsity,Computational Memory,Sparse Representation,28-nm CMOS,Deep Neural Network Workloads,Energy Efficiency,Column Vector,Partial Products,High Energy Efficiency,Binary Map,Parallel Operation,Edge Devices,Variable Success,Open Reduction,Compressed Format,Non-zero Weights,Zero Counts,Priority Queue,Sparse Techniques
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