Improvement Learning Using a Fully Integrated Neuro-Inspired Memristor Chip

Abstract Future neuro-inspired computing chips will feature high energy efficiency and extensive learning capabilities. Among these features, improvement learning is of great importance for edge intelligence devices to adapt to different application scenes and owners. However, current technologies for training neural networks greatly rely on large-scale computers, which are based on von Neumann architectures and complex digital circuits. The huge energy costs of moving massive data between computing and memory units and processing high-precision data hinder the implementation of improvement learning on edge devices. Here, we report improvement learning with a low-power full-system-integrated memristor-based neuro-inspired computing chip. We propose a memristor-featured analogue in-memory computing architecture for implementing on-chip learning efficiently and integrate ~160K memristor cells with complete peripheral circuits in a complementary metal-oxide-semiconductor (CMOS)-compatible technology. We demonstrate the on-chip learning of both new samples and new classes across various tasks, including motion control, image classification, and speech recognition. The energy consumption of the memristor chip for learning is three orders of magnitudes lower than that of a central processing unit (CPU)-based system based on hardware system measurements. This study is an important step toward the learning chips with much higher energy efficiency, which will facilitate the development of future smart edge devices that can adapt to all kinds of special scenes.