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OpenCL-based FPGA Accelerator for Semi-Global Approximate String Matching Using Diagonal Bit-Vectors

2021 31st International Conference on Field-Programmable Logic and Applications (FPL)(2021)

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摘要
An FPGA accelerator for the computation of the semi-global Levenshtein distance between a pattern and a reference text is presented. The accelerator provides an important benefit to reduce the execution time of read-mappers used in short-read genomic sequencing. Previous attempts to solve the same problem in FPGA use the Myers algorithm following a column approach to compute the dynamic programming table. We use an approach based on diagonals that allows for some resource savings while maintaining a very high throughput of 1 alignment per clock cycle. The design is implemented in OpenCL and tested on two FPGA accelerators. The maximum performance obtained is 91.5 MPairs/s for 100 x 120 sequences and 47 MPairs/s for 300 x 360 sequences, the highest ever reported for this problem.
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关键词
FPGA,Pre-alignment Filter,Bit-Parallel Alignment,Levenshtein Distance,Genomics,Sequencing
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