A 5nm Fin-FET 2G-Search/s 512-Entry X 220-Bit TCAM with Single Cycle Entry Update Capability for Data Center ASICs.
VLSI Circuits（2021）
关键词
single port TCAM cell array,search rate,memory density,data center ASICs,ternary content addressable memory design,SRAM words,TCAM entry,clock cycle,area overhead,search power penalty,application specific integrated circuits,Fin-FET 2G-search,single cycle entry update,TCAM update latency,time multiplexed input bus interface,silicon measurement,global peripheral circuitry,size 5.0 nm
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