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MOSFETs’ Electrical Performance in the 160-Nm BCD Technology Process with the Diamond Layout Shape

IEEE transactions on electron devices/IEEE transactions on electron devices(2020)

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摘要
This article introduces an innovative approach that describes the drain–source current improvements of MOS transistors. It is based on the geometrical modification of MOSFET’s channel from a rectangular layout shape (RLS) into a diamond layout shape (DLS). In this way, the drain–source current enhancement is increased up to 11% for the DLS MOS transistors with an effective aspect ratio ( ${W}/\textit {L)}_{\mathrm {eff}}$ equal to 2.0 and an angle $\alpha $ set to 80°. Moreover, we present the comparison of 3-D TCAD simulations data, analytical model data based on Schwarz–Christoffel transformation (SCT), and measurement data given by measurement of the MOS transistors fabricated in the Bipolar-CMOS-DMOS (BCD) 160-nm technology process. For this purpose, there have been fabricated 1124 samples, which were proportionally divided into RLS MOSFETs and DLS MOSFETs with the angles $\alpha $ equal to 120°, 100°, and 80°. For all studied aspect ratios, the presented model has an excellent analytic description in comparison with the 3-D TCAD simulation results with an error lower than 3%. So, it proves the quality of the analytical model based on the SCT approach and it is the recommended approach to use also for modeling other MOSFET gate layout shapes.
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关键词
160-nm Bipolar-CMOS-DMOS (BCD) technology,conformal mapping,diamond layout shape (DLS),electrical performance of integrated circuit (IC) Metal Oxide Semiconductor Field Effect Transistors (MOSFET),rectangular layout shape (RLS),Schwarz-Christoffel transformation (SCT)
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