Architectural memory co-simulation tool with floorplan, power, timing, and thermal Information
2017 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW)(2017)
摘要
In this work, we proposed the architectural memory co-simulation tool to generate the floorplan, power, timing, and thermal Information. A STTRAM prototype is applied as a design example to demonstrate the features of the proposed co-simulation tool.
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关键词
memory modeling,hotspot,STTRAM
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