Deriving a Multi-Level Program Model for Efficient Parallelization on Heterogeneous Platforms

Tremendous progress in automatic parallelization has brought advanced transformations for data parallelism and locality targeting chip multicore processors, but a platform as a whole is seldom considered. Emerging heterogeneous platforms composed of loosely coupled components such as CPUs, GPUs and specialized IP cores, oer unprecedented parallelization opportunities. We propose a hierarchical, multi-level program model, called HiPRDG, which enables more ecient mapping onto heterogeneous platforms, and describe a method for its derivation from the standard program model in the polyhedral framework. In addition, we show how a HiPRDG can be used to derive a multi-level parallel program capable of exploiting task, data, and pipeline parallelism on a heterogeneous platform with a GPU, and present performance improvements on a streaming application case study.