A 148ps 135mw 64-Bit Adder with Constant-Delay Logic in 65nm CMOS

Pierce I-Jen Chuang,David Li,Manoj Sachdev,Vincent Gaudet

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference（2012）

引用 6|浏览9

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关键词

CMOS logic circuits,adders,CD logic,CMOS process,complex logic functions,constant delay,constant-delay logic,critical path,dynamic logic,logic expressions,power 135 mW,single-cycle Ling adder,size 65 nm,word length 64 bit

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