Design of a Multistage Amplifier with High Gain and Wide Bandwidth Performance

Benqiang Lv,Xiaohong Peng,Zhiding Zhu,Xiaoqing Li

2012 Spring Congress on Engineering and Technology（2012）

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摘要

A high performance design of a three-stage amplifier is presented in this paper using the Impedance Adapting Compensation (IAC). The circuit is designed in 0.35 μm CMOS technology with 3.3V voltage power supply. When driving a 150 pF capacitive load, this amplifier achieves as high as 144dB dc gain,7.44MHz gain-bandwidth product (GBW) ,60° phase margin(PM),1.26V/us slew rate (SR) and 0.95mW power dissipation. This work provides a higher dc gain and wider GBW compared to other multistage amplifiers.

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关键词

CMOS analogue integrated circuits,compensation,radiofrequency amplifiers,CMOS technology,DC gain,IAC,bandwidth 7.44 MHz,capacitance 150 pF,capacitive load,gain-bandwidth product,impedance adapting compensation,multistage amplifier design,phase margin,power 0.95 mW,power dissipation,power supply,size 0.35 mum,slew rate,voltage 3.3 V

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