Package-on-Package (PoP) for Advanced PCB Manufacturing Process

J Y Lee,Jinyong Ahn,Jegwang Yoo,Joonsung Kim, Hwasun Park, Shuichi Okabe

Shanghai（2007）

Cited 2|Views6

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Abstract

In the 1990's, both BGA (ball grid array) and CSP (chip size package) are entering their end in the front-end packaging materials and process technology. Both BGA and CSP like SMD (surface mount device) from the 1980's and THD (through-hole mount device) from the 1970's are reaching its own impasse in terms of maximizing its electrical, mechanical, and thermal performances, size, weight, and reliability. Now, 3D packages are the next phase for its future use in advanced PCB manufacturing process. They can be classified into wafer level, chip level, and package level stacking. So, package-on-package (PoP), a type of 3D package level stacking, is to be discussed in this paper (Kada et al.)

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Key words

package-in-package (pip),wafer level packaging,advanced pcb manufacturing process,package-on-package,3d-chip-stacked-packaging,3d-chip-stacked-packaging (3d-csp),chip size package,wafer level,folded packages,surface mount technology,package-on-package (pop),3d packaging,chip level,through-hole mount device,printed circuit manufacture,ball grid array,stacked packaging,3d packages,package level stacking,surface mount device,ball grid arrays,chip scale packaging,manufacturing processes,package on package,chip,front end

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