Silicon Evaluation of Longest Path Avoidance Testing for Small Delay Defects
2007 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2(2007)
Abstract
This work presents a silicon evaluation of testing for small-delay defects using an approach called longest Path avoidance testing. The motivation for LPA testing is to improve outgoing product quality by identifying delay defects that escape critical path delay testing. Results from experiments run on high volume production 180nm ASIC are quantified in terms of test escapes and reliability escapes. Techniques for modeling the impact of small-delay testing are discussed.
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Key words
delays,fault diagnosis,nanotechnology,semiconductor device testing,LPA testing,critical path delay testing,longest path avoidance testing,nanometer technology,silicon evaluation,small delay defects
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