Hardware Implementation of Information Flow Signatures Derived via Program Analysis

How to integrate a new module to Leon3 processor and manipulate hardware checks so that multiple modules can be used simultaneously?  Handle dependencies of the designed modules on the specifics of the FPGA board (used to prototype the hardware), development tools, and implementation of the Leon3 processor  P. Dabrowski, W. Healey, K. Pattabiraman, S. Chen, Z. Kalbarczyk, and R. Iyer, “Hardware Implementation of Information Flow Signatures Derived via Program Analysis,” 2nd Workshop on Dependable & Secure Nanocomputing, organized in conjunction with Conference on Dependable Systems and Networks, DSN08, 2008.  G. Lyle, S. Chen, K. Pattabiraman, Z. Kalbarczyk, and R. Iyer, “An End-to-end Approach for the Automatic Derivation of Application-aware Error Detectors,” Proc. of the International Conference on Dependable Systems and Networks (DSN), pp. 584-589, 2009. FPGA Hardware Implementation of Reliability and Security Algorithms Atop Leon3 Processor Vivek Chauhan, Indian Institute of Technology, Kharagpur ADVISORS: Prof. Zbigniew T. Kalbarczyk, Prateek Patel I T I S U M M E R U N D E R G R A D U A T E I N T E R N P R O G R A M, 2 0 1 0