6.10 A 1/1.56-inch 50Mpixel CMOS Image Sensor with 0.5μm pitch Quad Photodiode Separated by Front Deep Trench Isolation

CMOS image sensors (CISs) in high-end mobile devices require wide dynamic range and superior image quality under extremely low light conditions [1]. To implement high-resolution sensors that meet market demand, a back-illuminated stacked sensor with front deep-trench isolation (FDTI) has proven to be effective in implementing submicron pixel sensors with excellent full-well capacity (FWC) and signal-to-noise ratio (SNR) [2, 3]. However, the main risk of FDTI is deterioration of dark temporal noise (TN) as the channel area of in-pixel amplifiers shrinks. In general, in-pixel transistor size is restricted by the presence of high-aspect-ratio DTI. Furthermore, phase-detection auto-focus (PDAF) of the entire imaging area is in high demand for mobile cameras in terms of its high speed and accurate focus, particularly under low-illumination conditions [4, 5]. In this work, a 50Mpixel sensor that satisfies the various characteristics and functions described above is reported. The sensor consists of a quad-PD (Q-cell) with a 0.5μm unit pixel sharing an inter-PD overflow (IPO) path through an intersection of DTIs between neighboring PDs. This shared structure plays an important role in: 1) increasing FWC required for wide dynamic range, 2) increasing conversion gain (CG) by simplifying metal routing of floating diffusion (FD) nodes at DTI intersections, 3) increasing the area of amplifiers in pixels, and 4) increasing sensitivity by removing the doped polysilicon of DTI on an optical axis. In this paper, we present an optimized pixel design and several solutions suitable for deep-submicron pixel sensors that achieve competitive FWC, TN and, sensitivity.