LNA Parameters Optimization Using Firefly Algorithm

In this paper, the Low Noise Amplifier circuit has been simulated using 45nm CMOS technology on Cadence Virtuoso software. The input impedance matching has been done using the transformer connected at the input. The source degeneration technique helped in proving the linearity while the cascade helped in achieving the good gain of the schematic. The buffer connected at the output provided the good output impedance matching. The various topologies has been discussed with their pros and cons. The LNA parameters has been optimized using the Firefly Algorithm. The Circuit has been simulated for the wideband and having the maximum gain of 17dB with 5.8dB minimum noise figure.