Design for Variability: Counter-Doped Source/Drain Epitaxy Pockets in Gate-All-Around FET

One of the obstacles in the evolution fromthe fin-shaped field-effect transistor (FinFET) to the gate-all-around field-effect transistor (GAAFET) is theetching-depth variation. In the process step for etching the source/drain (S/D) regions, the variation makesthe over-etching inevitable to avoid the fatal issue thatunder-etched region may induces (e.g., two adjacent gatescan be connected in the following processes). However,the over-etching goes with the degradation of device per-formance, especiallyOFF-state performance. To ease thedegradation, a counter-doped pocket was suggested inthis work. The process parameters for the pocket suchas the over-etching depth (T-ov), the pocket epitaxy thick-ness (T-EPI), and the pocket doping concentration (Npocket)were explored. Subsequently, the device performance was evaluated with respect toOFF-state leakage current (I-OFF)and threshold voltage (V-th) variation. It was confirmed thattheIOFFdecreased, and theVthvariation was suppressedwith optimized process parameters. By analyzing the totaldoping concentration at substrate, it also turned out thatthe GAAFET with the pocket can give advantageous impacton the feasibility