Mismatch error compensation of hybrid CS-DAC to achieve high figure of merit utilizing on-chip self-healing assisted swap-enabled randomization technique

The process and design variations during fabrication generate random mismatch-induced nonlinearities in Current steering DACs (CS-DACs), which are the main reason for performance degradation. Considering this, a mismatch error compensation method is highly desirable to boost both static and dynamic performances for the wide-band CS-DACs. To address this issue, an on-chip self-healing assisted swap-enabled randomization technique (SASR) is proposed in this work for the Nyquist band CS-DAC structures. This paper presents a robust hybrid CS-DAC architecture to enhance both static and dynamic performances. The partial self-healing method measures and recovers the mismatch current of the current cells. Further, to reduce the mismatch-based nonlinear distortions, swap-enabled randomization technique is adopted. This enhances the high-frequency spurious-free dynamic range (SFDR) values by mitigating inter and intra-segment mismatch errors. A higher figure of merit (FoM) is obtained for 10-bit CS-DAC architecture utilizing the proposed SASR technique compared with state-of-the-art DACs, which indicates the suitability for higher precision and high-speed CS-DAC structures. This study shows the flexible on-chip partial self-healing with minimum area overhead, two-dimensional randomization process with swap-enabled technique, high static and dynamic performances for Nyquist frequency, and higher figure-of-merit value. image