A Strong-Arm Comparator Layout Design with Combined Expert Knowledge and Intelligent Optimization Algorithm in 65nm CMOS

Placement and routing are critical to the post-layout performance of analog circuits. This is primarily due to parasitic caused by device spacing during placement, wire length, and width during routing cannot be effectively controlled, regardless of whether the layout is generated manually or through the use of automation tools. In this work, a simple and effective layout design flow is proposed and implemented for the Strong-Arm comparator to improve its post-layout performance. To begin with, the Strong-Arm layout style adopted by expert designers is leveraged as the placement template. Subsequently, the critical variables impacting the arrangement of devices and the performance of the circuit such as spacing between key components and the width of critical nets are identified. Finally, these variables are sent to the intelligent optimization algorithm to adjust the layout till the post-layout results can closely match the schematic. Overall, by integrating expert knowledge and the intelligent optimization algorithm, our approach yields promising post-layout results for the Strong-Arm comparator. Under a 1-V power supply, the comparator exhibits a root-mean-square input-referred noise of 88.2uV, which deviates by only 2% from the noise of the schematic.