A 23.9 µW 13.6-bit Period Modulation-Based Capacitance-to-Digital Converter with Dynamic Current Mirror Front-end Achieving Capacitor Range of 1 to 68 pF.

A multi-purpose capacitance-to-digital converter (CDC) needs to cover a wide input range (C IN < 50 pF) for various sensor applications such as a pressure sensor and a strain sensor. Typical CDCs using SAR or delta-sigma modulation have limitations in maintaining their energy-efficiency for such a wide input range, as they require to drive a large reference capacitor ( REF <10 pF) with a reference voltage buffer, resulting in high power consumption. On the other hand, CDCs using period-modulation (PM) are good alternative to achieve a large input range [1], [2]. The work in [1] digitizes an input capacitance (C IN ) using an iterative delay-chain discharge method. It achieves an excellent energy-efficiency of 0.14 pJ/step, but the effective resolution is limited to 7.9-bit since the charge captured on the C IN is discharged nonlinearly. The work in [2] generates D OUT proportional to a period ratio of the C IN to the C REF and achieves a high resolution of 114 aF at the cost of power and area consumption due to the use of a reference oscillator (140 µW and 0.175 mm ² ).