Impedancemetry of multiplexed quantum devices using an on-chip cryogenic CMOS active inductor

In the pursuit for scalable quantum processors, significant effort is being devoted to the development of cryogenic classical hardware for the control and readout of a growing number of qubits. In this manuscript, we present a novel approach called impedancemetry that is suitable for measuring the quantum capacitance of semiconductor qubits connected to a resonant LC-circuit. The impedancemetry circuit exploits the integration of a CMOS-based active inductor in the resonator with tunable resonance frequency and quality factor, enabling optimization of readout sensitivity for quantum devices. The realized cryogenic circuit allows fast impedance detection with a measured capacitance resolution down to 10 aF and an input-referred noise of 3.7 aF/Hz. At 4.2 K, the power consumption of the active inductor amounts to 120 μW, with an additional dissipation for on-chip current excitation (0.15 μW) and voltage amplification (2.9 mW) of the impedance measurement. Compared to commonly used schemes based on dispersive RF reflectometry which require mm-scale passive inductors, the circuit has a notably reduced footprint (50 μm × 60 μm), facilitating its integration in a scalable quantum-classical architecture. The impedancemetry method has been applied at 4.2 K to the detection of quantum effects in the gate capacitance of on-chip nanometric CMOS transistors that are individually addressed via multiplexing.