Contact Cavity Shaping and Selective SiGe:B Low-Temperature Epitaxy Process Solution for sub 10-9 Ω.cm2 Contact Resistivity in Nonplanar FETs

N. Breil, B-C. Lee, J. Avila Avendano, J. Jewell, M. Vellaikal, E. Newman,E. M. Bazizi, A. Pal, L. Liu,O. Gluschenkov, A. Greene, S. Mochizuki, N. Loubet, B. Colombeau, B. Haran

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)(2023)

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摘要
In order to tackle the CMOS contact resistance bottleneck, we developed a contact cavity shaping process that leverages a Reactive Ion Etching (RIE) technology, and a selective highly doped SiGe:B epitaxial process allowing an active boron doping level of 2E21 at.cm-3. By co-optimizing these processes in the contact module on 300mm wafers, we demonstrate a record low transistor contact resistance of 11 $\Omega.\mu$m of W eff with corresponding effective $\rho_{\mathrm{c}}$ of 5.2$\times 10^{-10}\Omega$.cm 2 , which translates into a device I eff performance gain of 44/19% (median/leading edge).
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