DLA-SP: A System Platform for Deep-Learning Accelerator Integration

Many deep-learning Accelerators (DLAs) are presented to meet high-performance needs in versatile deep-learning applications. However, they usually lack a flexible platform and flow for system integration. For assisting the professors and students in the academia of Taiwan to speed up their deep-learning accelerator implementation and verification of innovative system designs, the Taiwan Semiconductor Research Institute provides a new service platform named DLA-SP. The developed DLA-SP platform is highly flexible in contrast to existing DLA prototyping systems by providing three design resources: A parameterized DLA wrapper, an integration flow, and a hardware/software board support package. The parameterized DLA wrapper is capable of rate adaptation and format conversion between the DLA and the system. The number of DLA I/Os can be reduced to 29.7% to avoid the pad-limit DLA chip problem; The integration flow and methodology enable the DLA hardware system integration and DLA patterns reuse; The hardware/software board support package is capable of rapid deep-learning application development. The DLA-SP helps professors and students to concentrate their efforts on their deep-learning accelerators, and easily reuse system platforms, which greatly reduces the developing cycle of an embedded system. In this paper, a flexible system platform for deep-learning accelerators is presented, the accelerators can be easily integrated into our proposed DLA-SP system platform in both FPGA and chip ways for system verification and demonstration. A case study of a keyword-spotting accelerator is adopted as an example to illustrate how a DLA is integrated and works properly with our DLA-SP platform.