Adaptation and control of a latching current limiter based on a SiC N-MOSFET

Latching current limiters (LCLs) are circuits used for electrical load control on spacecrafts. They provide enhanced over current protection, improving reliability. LCL classic implementations are based on the use P-MOSFETs as the main current limiting device. However, new wide bandgap materials (WBG) offer the possibility to operate at higher voltages and, allegedly higher temperatures. Therefore, it exists the possibility to design an LCL architecture based on a SiC N-MOS device. In order to control the LCL and to adapt its working behaviour to a different N-MOS, the most important stages are the analog isolator (DCX) which is the one that controls the gate-source voltage level of the N-MOS, and the current control loop in charge of react if the sensed current is higher or not regarding the current reference. This way, this work presents a guideline for the design of the DCX and the current control loop stages. Finally, some experimental results for a class 10 LCL, following the proposed designs, for a bus voltage of 100 V will be shown.