A New Self-cascoded Based Charge-pump for Efficient Electrical Stimulation

We present in this paper a new 4-stage charge pump based on self-cascode structure. The circuit is designed and post-layout-simulated in 2.5/3.3V 90 nm CMOS technology. By performing this architecture, the ripple of the output and power consumption are reduced. Moreover, the circuit has low ripple output voltage when the rise and fall times increase. Using self-cascode structure decreases the effects of charge injection and clock feed through on the output voltage. The simulated output voltage of the proposed 4-stage charge pump with the load and pumping capacitors of 2pF is around 11.57V under an input voltage of 2.5V. The proposed structure improves the overall voltage gain. The gain of each stage and overall gain are 1.45 and 4.52, respectively. The circuit has a low ripple amplitude of 50 mV when the clock frequency is 5MHz. Since the new charge pump has a stable output and low current consumption, thus it is suitable for low-power and biomedical applications in CMOS processes.