Comparison between Conventional Load Flow, QSTS Simulation, and Dynamic Simulation to Assess the Operation of Step Voltage Regulators in Active Distribution Networks

The assessment of step voltage regulator (SVR) operation in active distribution networks requires computational analysis tools capable of tackling the emerging technical challenges. Conventional load flow (CLF), quasi-static time series (QSTS) and dynamic simulations are typically employed to investigate high-penetration distributed generation (DG) interconnection impacts. Regarding the SVR runaway condition phenomenon, however, a consensus has yet to be reached on the most cost-effective simulation technique for capturing and reproducing the correct sequence of events. This work presents a comparative study of the CLF, QSTS and dynamic simulation techniques through modelling and analysis of two SVR-controlled test-feeders, in order to evaluate each approach performance in addressing scenarios of DG-caused reverse active power flow. Detailed descriptions of feeder voltage profile and SVR tap operations are provided to facilitate understanding of the mechanisms that characterize SVR runaway condition, as well as the advantages and drawbacks of each of the studied simulation techniques.