A 12/16 GSps Time-Interleaved Pipelined-SAR ADC with Temperature Robust Performance at 0.75V Supply in 7nm FinFET Technology

This paper presents a 10.2b time-interleaved ADC in 7nm FinFET technology with 45/59 dBSNDR/SFDR at 12GSps and 41/55 dBSNDR/SFDR at 16GSps, while consuming 290 and 334mW, respectively. A temperature-stabilized dynamic residual amplifier achieves a low 11% gain deviation from -25C to 105C. This is the first pipelined-SAR ADC that operates above 10GSps with robust performance over temperature with a 0. 75V supply. The ADC has 1. 3x lower input range than state-of-the-art ADCs to relax RF front-end linearity and yet achieves a competitive FoM of 148 dB.