A 7-10b Programmable Cryo-CMOS TI-SAR ADC for Multichannel Qubit Readout with On-Chip Background Inter-Channel Mismatch Calibrations

This paper presents a cryo-CMOS dynamic-precision time-interleaved (TI) SAR ADC for FDM-based qubit readout. The ADC includes on-chip background calibration engines to compensate for dynamic inter-channel mismatches of gain, offset, and sampling phases. To mitigate the effect of increased threshold voltage at cryogenic temperature, comparators with native NMOS input stage and sampling switches with low threshold voltage transistors were employed. The implemented IC in 40nm CMOS is verified at 4K and shows Nyquist-rate SNDRs of 50.1dB, 45. 9dB, 44.0dB, and 38.3dB with 10b, 9b, 8b, and 7b modes at the sampling rates of 500MHz,820MHz, 900MHz, and 1200MHz, respectively. The ADC consumes 5.91mW while achieving the Walden FoM of 45.1fJ/conv.-step with 10b mode.