Modelling and Optimization of a Mixed-Signal Accelerator for Deep Neural Networks.

This paper proposes an analytical model for the optimized circuit design in an SRAM-based mixed-signal accelerator for Deep Neural Networks. The model, includes fundamental non-idealities to maintain the information content of the MAC operation, and it exploits a statistical approach to generates specification for the memory accelerator. In a case of study, the model optimization carried out with MATLAB allows to avoid three bits of ADC over-design, with large area and energy savings.