$f_{MAX}$ Exceeding 3 GHz in Self-Aligned Zinc-Oxide Thin-Film Transistors with Micron-Scale Gate Length.

Large-area electronic (LAE) metal-oxide thin-film transistors (TFTs) with $f_{T}$ and/or $f_{MAX}$ beyond 1 GHz demonstrated over recent years [1]–[3] enable critical circuits and systems towards wireless applications in Internet of Things and 5G/6G (e.g., a 1-GHz phased array for far-field radiation beam steering [4]). Since most existing approaches towards GHz TFTs rely on improved charge-carrier mobility through high-temperature deposition of semiconductors and/or submicron TFT feature size achieved by electron-beam lithography, they are incompatible with low-cost, large-area, and flex-substrate fabrication of TFTs. By additional dependence on gate resistance $R_{G}, f_{MAX}$ opens broader device engineering space to maintain large-area and flex-compatibility, and motivates $f_{MAX}$ -limited circuit/system topologies [4]. Here, we show that with optimal TFT bias voltages and reduced $R_{G}$ through TFT width scaling, a record-high $f_{MAX}$ exceeding 3 GHz is achieved in self-aligned zinc-oxide (ZnO) TFTs with gate length of $\sim 1\ \mu m$ , patterned by photolithography, with a maximum process temperature of ∼200 °C. A high-frequency non-quasi-static TFT model [5] is used to guide the device engineering efforts towards this result.