Physical Computing for Hopfield Networks on a Reconfigurable Analog IC.

This paper discusses physical computing for solving optimization problems using a Hopfield network built on a Field Programmable Analog Array (FPAA). A core Hopfield circuit is presented that uses a programmable Vector-MatrixMultiply (VMM) and Transconductance Amplifier (TA). The circuit dynamics of the VMM and effects of mismatch are discussed. The analog Hopfield network is evaluated by inputting a graph to the network and solving the NP-hard max-cut problem. Experimental results show convergence time in the order of microseconds towards a optimal solution on a four and ten node graph.