An NS-SAR ADC with Full-bit High-order Mismatch Shaped CDAC.

This paper presents the analysis and behavioral modeling of two high-order DAC linearity enhancement techniques and constructs a third-order noise-shaping (NS) SAR ADC with full-bit high-order mismatch-shaped capacitor DAC(CDAC) to verify the performance. The CDAC is divided into an MSB segment and two LSB segments, where a third-order VMS and a second-order MES are utilized to deal with the capacitance mismatch respectively. With the enhancement of the behavioral model, optimizations focused on the mismatch transfer function (MTF) and segment length of MSB and LSB are made. The simulation results of obtained system achieve 113.25dB SNDR and 18.52 ENOB when 1% CDAC mismatch is introduced.