Area-Efficient Accelerator for the Full NTRU-KEM Algorithm.

Among Post Quantum Cryptography (PQC) algorithms, Nth-degree Truncated-polynomial Ring Units Key Encapsulation Mechanism (NTRU-KEM) emerged as a promising cryptosystem for key establishment. However, the algorithm requires more storage space and computation resources compared to classical cryptosystems, resulting in substantial memory and performance overheads. To mitigate these overheads, researchers have focused on enhancing the efficiency of the NTRU-KEM algorithm with dedicated hardware implementation, but have excluded the key generation function, resulting in a tenfold increase in latency when generating new keys frequently. In this paper, we aim to implement an efficient NTRU-KEM algorithm with full functionality by incorporating all functions, including key generation, using a hardware and software co-design approach. We strategically allocate functions based on their inherent parallelism and execution time to hardware or software. Our approach entails implementing hardware modules to be shared across multiple sub-functions as much as possible to achieve optimal performance improvement over hardware resources. Our implementation demonstrated a significant speedup compared to pure software implementation in the execution time of all three functions of NTRU-KEM, with a remarkable performance improvement in key generation. Our approach resulted in more than three times the area reduction effect compared to prior work focused only on encapsulation and decapsulation functions, and showed similar or better results of performance per area depending on the function.