Optimized emitter-base interface cleaning for advanced Heterojunction Bipolar Transistors

Heterojunction Bipolar Transistors needed for high-frequency applications require precise dopant control. In -situ doped epitaxies used during device fabrication rely on surface preparation to obtain an optimized doping profile. Defects due to imperfect cleaning relates to high emitter resistance and low-frequency noise. Base epitaxy is followed by the fabrication of thin L-shaped oxide spacers and in-situ arsenic-doped emitter epitaxy by Low Pressure Chemical Vapor Deposition. A cleaning step between spacers formation and emitter epitaxy is mandatory to remove residual contamination. Hydrofluoric acid (HF) wet cleaning, in-situ remote plasma cleaning (SiconiTM) and thermal treatments have been tested. A minimum etching budget is sought for limiting spacer consumption while adequately cleaning the interface. Time Of Flight-Secondary Ion Mass Spectroscopy (TOF-SIMS) and High-Resolution Transmission Electron Microscopy (HR-TEM) are used to characterize the interface and measure levels of arsenic, oxygen, fluorine and carbon. Emitter resistance and base-emitter breakdown voltage measurements are used to show the impact on electrical figures of merit. Siconi targeting 10 & ANGS; of thermal oxide removal followed by a thermal treatment (800 degrees C, 60 s) in the deposition chamber results the best process among the tested ones.