A Cost-Efficient Reversible-Based Reconfigurable Ring Oscillator Physical Unclonable Function

Physical Unclonable Function (PUF) has been advocated as a promising solution for the hardware security of the Internet of Things (IoT). Nevertheless, the development of the IoT constrained devices is limited due to an important factor which is power. By leveraging the reversible logic paradigm, PUF can mitigate the power limitation. Integrating reversible logic into PUF alleviates the security and power challenges that limit the advancement in IoT and hardware security. To the best of our knowledge, this work is the first to design a cost-efficient reversible-based reconfigurable ring oscillator PUF (denoted as (RO)-O-3 PUF) for IoT and hardware security. The proposed design leverages the reversible logic paradigm and achieves better performance with significantly less hardware resources requirement compared to other conventional ring oscillator (RO) PUF, configurable RO (CRO), and reconfigurable (RRO) PUF designs. Quantum and comparative analysis for the (RO)-O-3 PUF is discussed in this paper. The proposed (RO)-O-3 PUF is able to generate more Challenge Response Pairs (CRPs) compared with state-of-the-art RO PUFs with using an equal number of configurable logic blocks (CLBs) of an FPGA. (RO)-O-3 PUF requires only 50% and 25% of hardware resources to generate 1-bit PUF response compared to other CRO PUFs and RRO PUFs, respectively. (RO)-O-3 PUF's results show that the proposed model is suitable for enhancing a lightweight hardware security system especially for root of trust (RoT), authentication and key generation applications and eliminating the need for trading the security with power reduction.