High Throughput and Low Latency Hardware of Contrast Limited Adaptive Histogram Equalization Algorithm

Contrast Limited Adaptive Histogram Equalization (CLAHE) is an effective technique to enhance the visibility of details and avoid excessive amplification of noises in a local region of an image. CLAHE statistics the probability density histograms of pixels redistribute the histograms and calculates the output value of pixels by remapping the intensity values using the redistributed histograms. However, high computational complexities and data dependence make the hardware design with high area efficiency and high throughput a difficult problem. In this study, we analyze the dependence of data in the algorithm and present an ideal sequence diagram that describes the relationship between input and output signals. Based on this sequence diagram, flexible line buffers and an efficient memory accessing scheme for histograms are proposed. Besides, we provide a unified interpolation circuit for three cases. As a result, we implement a low latency and high throughput hardware architecture of CLAHE whose performance almost achieves the ideal case as analysis. According to the experimental results, this design operates at up to 133.3 MHz frequency enabling processing 1080p@60fps in real-time on Xilinx XC7Z010 FPGA.