Magnitude to Digital Converter with Latch-Type Comparator and Dynamic Switching Current Scheme

A magnitude to digital converter is proposed using a latch-type comparator to replace the conventional opamp-based comparator. The PVT-dependent timing error can be relieved by employing the latch-type comparator and rearranging the decision control circuits. Besides, the power efficiency can be improved within the low and high speed operations. For increasing the linearity of the converting process, a dynamic current source is also developed to obtain the best coefficient of determination. A prototype of 10-bit converter was designed to operate at 40-kS/s with only 56.S-$\mu$W of power dissipations, respectively.