A High-Sensitive High-Input Impedance CMOS Front-End Amplifier for Neural Spike Detection

Neural spikes detection and monitoring for neuro-prosthetic applications require an efficient and robust front-end amplifier (FEA), which regulates the fidelity of the neural signal. This paper presents neutralization and bootstrapping techniques to overcome the input leakage currents produced by amplifiers of the input bias network. In addition, a pseudo-resistor technique ensures the FEA maintains a high-input impedance. The CMOS-based FEA architecture is executed in the advanced design system with the design kit of the CMOS process. The proposed design achieves a high-input impedance of 0.5 TΩ with a maximum simulation gain of 66.2 dB. The overall power consumption of the topology is observed as 2.6 µW with a power supply voltage of 0.9 V. The simulated noise performance of 6 nV/√Hz at 1 kHz demonstrates a high-sensitive design compared to the previous works. It is highly recommended for succeeding neuro-prosthetic applications.