Reliability challenges in Forksheet Devices: (Invited Paper)
2023 IEEE International Reliability Physics Symposium (IRPS)(2023)
摘要
The forksheet (FSH) device architecture is a possible candidate towards continued logic cell downscaling. It consists of vertically stacked n- and p-type sheets at opposing sides of a dielectric wall. In this work, we overview the time-0 and time-dependent performance of n and p-type FSH field-effect transistors co-integrated with nanosheets (NSH) in individual wafers. A separate assessment of dedicated capacitors yields indications of a non-negligible effect of negative fixed charges trapped in low-temperature deposited SiO
2
, currently used as dielectric wall liner. Finally, we evaluate the impact of using a bottom dielectric isolation (BDI) instead of a junction-based electrical isolation of the sheets from the substrate.
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关键词
Forksheet FETs,FSH,BDI,Nanosheet FETs,NSH,hot-carrier degradation,HCD,trapping,oxide defects,FET arrays,bottom dielectric isolation
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