A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization

Capacitive sensors have been widely used to measure physical quantities such as humidity, acceleration, and pressure. With the quick evolution of loT applications, capacitive sensor readout circuits featuring low latency, high resolution, and high energy efficiency are highly desirable. The SAR-based readout architecture achieves high energy efficiency, but it only suits low-to-medium resolution applications [1]. $\Delta\Sigma$ modulators ($\Delta\Sigma$Ms) can achieve high resolution [2]–[4]. However, they cannot support single-shot measurements and require repeated charging of the sensing capacitor, leading to low energy efficiency and long measurement latency. The SAR-TD$\Delta\Sigma$ architecture realizes high energy efficiency using time domain operation [5]. However, it requires two sensors, largely increasing system cost. in addition, its PFD-based quantizer does not fully exploit the time domain information.