Precision-Aware Workload Distribution and Dataflow for a Hybrid Digital-CIM Deep CNN Accelerator

SRAM-based Computing-in-memory (CIM) circuits have been demonstrated as a promising solution to effectively accelerate the inference of convolutional neural networks (CNNs) by shifting computation into the memory arrays. However, the advantages of CIM accelerators will disappear as increasing the bit precision and adopting advanced process technology due to the overhead caused by ADC/DAC and poor technology scaling capability of analog circuits. In this paper, a hybrid digital-CIM accelerator was proposed to solve above problems and the weights and activations of different layers are quantized to different precision (high, medium, and low precision). Moreover, precision-aware workload distribution and dataflow are proposed for the hybrid digital-CIM accelerator. Overall, the proposed accelerator can achieve 12.481 TOPS/W.