An Asynchronous Tsetlin Automaton Architecture with Integrated Non-volatile Memory

This paper presents an asynchronous Tsetlin Automaton (TA) architecture based on non-volatile memory technology. The use of non-volatile local storage in TA states aims to reduce the data movement and improve system robustness through data retention. Adopting asynchronous TA designs helps to eliminate the need for clock trees with the potential to improve performance and energy efficiency. The proposed design features non-volatile TA cell circuits and includes asynchronous controls together with their interfacing subsystems. The presented TA in this paper is the first attempt at designing TAs with non-volatile memory cells and asynchronous control mechanism. The cell designs can be used as modular libraries to construct Tsetlin Machines (TMs) for machine learning applications, in particular for AI at the edge, where data retention is important in the face of unpredictable power supplies.