Systematic Embedded Development and Implementation Techniques on Intel Myriad VPUs

The worldwide demand for speed in applications challenges the deployment of compute-intensive algorithms at the power-constrained edge. Novel embedded devices such as the heterogeneous Vision Processing Units (VPUs) emerge as a promising solution for low-power embedded imaging/vision applications, as they accelerate computer vision algorithms and convolutional neural networks with only 1-2W. In this brief, we propose a development methodology for exploiting the full potential of the VPU heterogeneity and providing sufficient acceleration within their restricted power envelope. Based on this methodology, we demonstrate the development paradigm on the Myriad VPUs and report experimental results from the implementation of demanding image processing kernels.