A 4-9 GHz Reconfigurable Differential Power Combiner/Splitter in 65nm CMOS

In this paper, a 4-9 GHz reconfigurable differential power combiner/splitter in a 65nm CMOS process is presented for the phased array communication. With cross-coupled transistor pair, the single-pole single-throw (SPST) switch is realized with high isolation and linearity performance. For interconnecting purpose, a differential grounded shielded CPW (GSCPW) is introduced for low insertion loss and high isolation performance. The measurement results show that the insertion loss of the power combiner/splitter, including the Balun, SPST and GSCPW, is about -10.7dB at 6 GHz. Moreover, the SPST has an isolation of more than 40 dB.