Lower bounds for Boolean circuits of bounded negation

JOURNAL OF COMPUTER AND SYSTEM SCIENCES(2022)

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摘要
The negation width of a Boolean AND, OR, NOT circuit computing a monotone Boolean function integral is the minimum number w such that the unique formal DNF produced (purely syntactically) by the circuit contains each prime implicant of f extended by at most w solely negated variables. The negation width of monotone circuits is zero. We first show that already a moderate allowed negation width can substantially decrease the size of monotone circuits. Our main result is a general reduction: if a monotone Boolean function f can be computed by a non-monotone circuit of size s and negation width w, then integral can be also computed by a monotone circuit of size s times 4 min{wm, mw} log M, where m is the maximum length of a prime implicant and M is the total number of prime implicants of f. (c) 2022 Elsevier Inc. All rights reserved.
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关键词
Boolean circuits,Monotone circuits,Lower bounds
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