Extending the Scaling Limit of Silicon Channel Transistors Through hhk-Silicene Monolayer: A Computational Study

Conventional bulk silicon is approaching its physical limit in the continued scaling of field-effect transistors (FETs). To extend the scaling limit of silicon-FETs, 2-D silicon semiconductors are highly desired because of the atomic thickness and mature CMOS-compatibility. By employing the hybrid honeycomb-kagome (hhk)-silicene monolayer as transport channel, we study the performance of sub-5-nm p- and n-type FETs based on ab initio quantum transport simulations. The hhk-silicene pFET (nFET) can be scaled down to 2-nm (3 nm) gate length ( $L_{g}$ ) with performances fulfilling the high-performance requirements of International Technology Roadmap for Semiconductors (ITRS) for 2028 horizon. Besides, with $L_{g}$ scales down to 3 nm, the subthreshold swing (SS) of the hhk-silicene FETs still can break the thermal limit of 60 mV/dec. The subthermal switches of hhk-silicene FETs benefit from the relatively isolated bands near the Fermi level. This work reveals the great potentials of hhk-silicene for ultrascaled and steep-slope FETs in future.