Assessing Power Efficiency and Performance in Nanosatellite Onboard Computer for Control Applications

This article deals with the specification, realization, and testing of a novel benchmark to evaluate different microprocessors performance of nanosatellite onboard computers. Considering the current trend of nanosatellite in which reduced size, weight, and power consumption are in focus, the interest in solutions with a single onboard processor has increased posing new challenges for future applications. One of the major problems encountered in this context is how to analyze computer resources to meet onboard processing requirements of specific applications. Although a set of traditional benchmark programs already exists, the available set of instructions is not representative of some modern applications based on nanosatellites, such as attitude determination and control (ADC). In this context, the focus of this work is on benchmark assessment for ADC applications. A review of the main up to date control algorithms is presented to identify the main features to be explored in the proposed benchmark algorithm. The proposed benchmark is validated on three different low-cost microprocessors, commonly used not only in nanosatellite missions but also in hardware-in-the-loop ADC simulators, through performance analysis of output power consumption. The proposed solution contributes to increase the capacity of computer resource analysis and improve the current onboard computer selection guidelines.