HMMU: A Hardware-based Hybrid Memory Management Unit

The demand for memory capacity increases dramatically for mobile applications. Mobile device manufacturer rapidly expanded the DRAM size, catering to such demand. For example, the DRAM capacity of the flagship phones from the Samsung Galaxy S series have expanded by 16X over the past ten years. While this approach has been largely successful to date, the size of DRAM is constrained by both cost/economics and energy consumption. Unlike data centers, mobile devices are highly cost-sensitive and have a highly limited energy budget. Moreover, the DRAM technology has a substantial background power, constantly consuming energy even in idle due to its periodic refresh requirement, which scales with DRAM capacity. Therefore, the approach of provisioning more DRAM is not sustainable and hard limits will soon be hit on the scaling of the future mobile memory system. The emergence of several Non-Volatile-Memory (NVM) technologies, such as Intel 3D Xpoint, memristor, Phase-change-memory(PCM), provides a new avenue to address this growing problem. These new memory devices promise an order of magnitude higher density [2] per cost and lower static power consumption than traditional DRAM technologies, however, their access delay is significantly higher, typically also within one order of magnitude of DRAM. Further, these new technologies show significant overheads associated with writes and are nonvolatile. Thus, these emerging memory technologies present a unique opportunity to address the problems of growing application workload footprints with hybrid memory systems composed of both DRAM and emerging NVM memories.